Design of a Domestic Low-Power Miniaturized Visible Light Imaging Assemblies

Mainstream visible light cameras are generally characterized by large volume, high power consumption, and reliance on imported core components. Meanwhile, stringent requirements for miniaturization and ultra-low power consumption of star sensors exist in aerospace, navigation, and other fields. To address these challenges, a homegrown design technology for low-power, miniaturized visible light imaging assemblies is proposed in this paper. This technology employs YIS2SIP50T, a high-performance, low-power domestic SIP circuit integrated with low-power FPGA and MCU circuits. Through architecture optimization and three-dimensional integration design, the size of a single circuit board is compressed to 25 mm × 23 mm, and the volume of the entire device (excluding the lens) is reduced to 35.8 mm × 51.5 mm × 43.4 mm. Combined with a dynamic power management strategy, the operating power consumption is stably kept below 1.5 W. This research lays a technical foundation for developing fully autonomous, controllable, miniaturized, and low-power domestic star sensors, and is applicable to vehicle-mounted, airborne, shipborne, and spaceborne platforms.